Samsung Debuts zHBM Prototype, Stacking Memory Directly on AI Accelerators

A lot of the AI progress is stalled because these chips do not handle thermal contraction/expansion well at all, and end up permanently destroying these chips. HBM has been a failure at this scale with chips getting destroyed every 4 months or so during operations.

I'd like to see some actual science saying, here was the problem, here's how we solved it, here's the AFR data, here's this running after X cycles etc. Nobody has done this reliably yet. That entire industry is hiding the bodies.

Where is the HBM controller in this design? Stacked in a middle layer or integrated into the main GPU die?

>"According to the company [Samsung],

zHBM can deliver up to eight times the data-processing performance of eighth-generation High Bandwidth Memory (HBM5) while improving performance per watt by a factor of three.

Thermal resistance is reduced by more than half, enhancing both system stability and energy efficiency."

What happened to the idea of having tiny tubes running through chips that liquid would flow through? Cooling the inside of chips directly. Did it end up causing more problems than it solved?

How much of the benefit here comes from shorter data paths, versus simply being able to fit more memory closer to the accelerator?

I know consumers hate the situation with ram and storage prices right now, as do I. But at least on the bright side all this AI investment has unlocked a lot of progress in a space that didn't see huge advancements in a good while. All these 10-20% improvements gen-on-gen have resulted in upgrade cycles of well over 5 years for many use cases in order to really feel like it's worth it. RAM capacities especially have felt near stagnant for a decade.

if all thats true, this is some impressive specs.

stacking memory right on the accelerator feels inevitable. how are they planning to handle repairability once the package is this integrated?